CMOS-MEMS integration (PDF)
Full board level analysis
Chip level packaging
High frequency analysis
Effects of package pressure on performance
Q factor calculation
Linear, nonlinear, static, steady state, modal, harmonic and transient analysis
Stress, strain, warpage analysis
Frequency spectrum sweeps
Q factor determination
Shock analysis and drop tests
Vibration and variable frequency testing
Conductive/Convective effects
Floating conductors
High frequency Electromagnetic testing
Coupling between traces
Parasitic/Substrate coupling and cross talk
Package and board resonances
Reflection noise and transmission characteristics
S-, Z- and Y-parameter calculations; impedence mismatch
Circuit-package interaction
Perform MIL-STD, JEDEC and Telcordia (Belcore) type tests

All inclusive
One of our dictums is to concurrently design MEMS devices and packaging. Far too many MEMS projects fail due to a lack of packaging considerations upfront.
IntelliSuite simplifies the packaging of MEMS devices, reducing the cost of packaging development. The tools you need to perform die level and board level packaging analyses come standard with IntelliSuite.

Packaging related stresses, CTE mismatches, shock effects, effects of packaging pressure on device damping, parasitic effects and high frequency electromagnetic effects can all be modeled with ease.

Computationally efficient
In addition to fully integrated device-package analysis, IntelliSuite can use a technique called sub-modeling to greatly reduce computation time. IntelliSuite first models the package under the loads and conditions of the package environment. The results are then linked to the device model as boundary conditions. A new simulation is then run to model package and device interactions.

Wrap it up
IntelliSuite solves most complex packaging problems involving linear and non-linear, static, frequency, and dynamic behavior. Stress, strain and warpage calculations, modal and buckling analysis, and the thermal-electrical (joule heating) response of packaged devices can all be performed with ease.

Users can model the dynamic response of packaged devices to complex vibration inputs, perform shock analysis, incorporate convective heat losses, and calculate Q factors. Fully coupled squeeze film damping modeling allows you to determine device performance as a function of package pressure. This allows you to perform JEDEC, MIL STD, or Belcore tests on packaged devices before costly device fabrication.

High frequency analysis
For high frequency RF MEMS and Microwave MEMS devices such as RF switches, filters, and inductors, users can model package related artifacts such as EM coupling between traces, parasitic or substrate coupling, crosstalk, package and board resonance artifacts, impedance mismatches, and reflection noise. Full circuit-package interaction studies and S-, Z-, and Y-parameters can also be derived.

General
• Group collaboration
• Device repositioning within a package and within different packages, misalignment effects
• Import/Export from DXF, PATRAN, ANSYS etc
• Touchstone and SPICE integration
• Parametric variations
• Fabrication process-induced effects
• Submodeling, symmetry, and other size reducing techniques
• Export and import to/from other engineering CAD tools

Coupled thermo-electro-mechanical analysis
• Linear/Nonlinear, frequency/static/dynamic analysis
• Stress/Strain, Deformation/Warpage analysis
• Modal and buckling analysis
• Frequency spectrum analysis
• Coupled squeezed film damping analysis
• Mechanical shock analysis and drop tests
• Vibration variable frequency testing
• Lead integrity tests
• CTE mismatch & thermal gradient analysis
• Q factor determination
• Joule heating effects
• Conductive/Convective effects

High frequency analysis (EM module required)
• EM coupling between traces
• Parasitic/ Substrate coupling and cross talk
• Package/board resonances
• S-, Z-, and Y-parameter calculations; impedence mismatch
• Reflection noise &Transmission characteristics
• Circuit-package interaction (need MEMSystem™)

Testing
• Perform MIL-STD (750/883), JEDEC (JESD22-B104B, -B110,-B103-B), and BelCore type tests on devices



© 2005 IntelliSense Software Corp. All rights reserved.

IntelliSuite, Total MEMS Solutions, CAD for MEMS, MEMaterial, AnisE, are registered trademarks of IntelliSense Software Corp.